november 2010 doc id 18055 rev 1 1/10 10 HSP061-8M16 8-line esd protection for high speed lines features ultralarge bandwidth: 6.3 ghz ultralow capacitance: 0.6 pf low time domain reflection low leakage current: 100 na at 25 c extended operating junction temperature range: -40 c to 150 c package size in mm: 3.3 x 1.5 x 0.55 rohs compliant benefits high esd robustness of the equipment suitable for high density boards complies with following standards mil-std 883g method 3015-7 class 3b: ?8 kv iec 61000-4-2 level 4: ? 8 kv (contact discharge) ? 15 kv (air discharge) applications the HSP061-8M16 is designed to protect against electrostatic discharge on sub micron technology circuits driving: hdmi 1.3 and 1.4 digital video interface display port serial ata figure 1. functional schematic (top view) description the HSP061-8M16 is an 8-channel esd array with a rail to rail architecture designed specifically for the protection of high speed differential lines. the ultra-low variation of the capacitance ensures very low influence on signal-skew. the large bandwidth and the low reflection make it compatible with 3.4 gbps. the device is packaged in qfn-16l with a 400 m pitch, which minimizes the pcb area. qfn-16l in 1 in 2 in 3 in 4 in 5 in 6 in 7 in 8 out 1 out 2 out 3 out 4 out 5 out 6 out 7 out 8 gnd on tab 1 2 4 5 6 3 7 8 16 15 13 12 14 10 9 11 www.st.com
characteristics HSP061-8M16 2/10 doc id 18055 rev 1 1 characteristics table 1. absolute maximum ratings t amb = 25 c symbol parameter value unit v pp peak pulse voltage iec 61000-4-2 contact discharge iec 61000-4-2 air discharge 8 15 kv i pp repetitive peak pulse current (8/20 s) 3 a t j operating junction temperature range -40 to +150 c t stg storage temperature range -65 to +150 c t l maximum lead temperature for soldering during 10 s 260 c table 2. electrical characteristics t amb = 25 c symbol parameter test conditions min. typ. max. unit v br breakdown voltage i r = 1 ma 6 v i rm leakage current v rm = 3 v 100 na v cl clamping voltage iec 61000-4-2, +8 kv contact (i pp = 30 a), measured at 30 ns 14 v c i/o - gnd capacitance (input/output to ground) v i/o = 0 v f = 200 to 3000 mhz, v osc = 30 mv 0.6 0.8 pf c i/o - gnd capacitance variation (input/output to ground) v i/o = 0 v f = 200 to 3000 mhz, v osc = 30 mv 0.03 0.05 pf f c cut-off frequency -3db 6.3 ghz z diff differential impedance t r = 200 ps (10 - 90%) (1) z 0 diff = 100 90 105 1. hdmi specification conditions. this information can be provided for other applic ations. please contact y our local st office.
HSP061-8M16 characteristics doc id 18055 rev 1 3/10 figure 2. leakage current versus junction temperature (typical values) figure 3. s21 attenuation measurement 0.1 1.0 10.0 100.0 1000.0 25 50 75 100 125 150 i r (na) v r =v rm = 3 v tj (c) db 10mhz 30mhz 100mhz 300mhz 1ghz 3ghz -8 -7 -6 -5 -4 -3 -2 -1 0 f (hz) figure 4. differential impedance (z diff ) (1) figure 5. eye diagram, hdmi mask, at 3.4 gbps per channel (1) 1. hdmi specification conditions. this information can be provided for other applic ations. please contact y our local st office. tr = 200 ps (10% - 90%) 12.5 /div z 0diff = 100 - vertical : 200 mv / div horizontal : 50 ps / div figure 6. esd response to iec 61000-4-2 (+8 kv contact discharge) figure 7. esd response to iec 61000-4-2 (-8 kv contact discharge) 50 v / div 20 ns / div 20 gs / s 50 v / div 20 ns / div 20 gs / s
ordering information scheme HSP061-8M16 4/10 doc id 18055 rev 1 2 ordering information scheme figure 8. ordering information scheme hsp 06 1 - 8 m16 high speed line protection breakdown voltage version number of lines package qfn-16l
HSP061-8M16 package information doc id 18055 rev 1 5/10 3 package information epoxy meets ul94, v0 lead-free package in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. table 3. qfn-16l dimensions ref. dimensions millimeters inches min. typ. max. min. typ. max. a 0.50 0.55 0.60 0.020 0.022 0.024 a1 0.00 0.02 0.05 0.000 0.001 0.002 b 0.15 0.20 0.25 0.006 0.008 0.010 d 3.20 3.30 3.40 0.126 0.130 0.134 d2 2.45 2.60 2.70 0.096 0.102 0.106 e 1.40 1.50 1.60 0.055 0.059 0.063 e2 0.20 0.35 0.45 0.008 0.014 0.018 e 0.40 0.016 k0.20 0.008 l 0.20 0.30 0.40 0.008 0.012 0.016 figure 9. footprint recommendations (dimensions in mm) figure 10. marking d e a e d2 l b k e2 a1 index area (d/2 x e/2) exposed pad pin # 1 id 0.40 0.45 0.40 0.20 2.80 3.00 0.85 1.75 xx ww y p dot: pin 1 xx: marking ww: assembly week y: assembly year p: assembly plant
package information HSP061-8M16 6/10 doc id 18055 rev 1 figure 11. qfn-16l tape and reel specification dot identifying pin a1 location user direction of unreeling all dimensions are typical values in mm 4.0 4.0 2.0 12.0 1.75 5.5 ? 1.55 0.80 1.80 0.25 3.60 xx ww yp xx ww yp xx ww yp
HSP061-8M16 recommendation on pcb assembly doc id 18055 rev 1 7/10 4 recommendation on pcb assembly figure 12. recommended stencil window position 4.1 solder paste 1. use halide-free flux, qualification rol0 according to ansi/j-std-004. 2. ?no clean? solder paste recommended. 3. offers a high tack force to resist component displacement during pcb movement. 4. use solder paste with fine particles: powder particle size 20-45 m. 4.2 placement 1. manual positioning is not recommended. 2. it is recommended to use the lead recognition capabilities of the placemen t system, not the outline centering. 3. standard tolerance of 0.05 mm is recommended. 4. 3.5 n placement force is recommended. too much placement force can lead to squeezed out solder paste and cause solder joints to short. too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. to improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. for assembly, a perfect supporting of the pcb (all the more on flexible pcb) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. 200 m 450 m 422 m 192 m 14 m 14 m 4m 4m 2800 m 400 m 2000 m 280 m 400 m 400 m 60 m 60 m footprint stencil window footprint t=100 m
recommendation on pcb assembly HSP061-8M16 8/10 doc id 18055 rev 1 4.3 pcb design 1. to control the solder paste amount, the closed via is recommended instead of open vias. 2. the position of tracks and open vias in the solder area should be well balanced. the symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. figure 13. printed circuit board layout recommendations 4.4 reflow profile figure 14. st ecopack ? recommended soldering reflow profile for pcb mounting note: minimize air convection currents in the reflow oven to avoid component movement. gnd 2 4 5 3 6 7 8 1 15 13 12 14 11 10 9 1 6 16 footprint pad pcb tracks 0 01234567 time (min) temperature (c) 2c/s recommended 6c/s max 220c 125 c 260c max 255c 180c 90 sec max 10-30 sec 90 to 150 sec 3c/s max 0 01234567 time (min) temperature (c) 2c/s recommended 6c/s max 220c 125 c 260c max 255c 180c 90 sec max 10-30 sec 90 to 150 sec 3c/s max
HSP061-8M16 ordering information doc id 18055 rev 1 9/10 5 ordering information 6 revision history table 4. ordering information order code marking package weight base qty delivery mode HSP061-8M16 hd qfn-16l 12 mg 3000 tape and reel (7?) table 5. document revision history date revision changes 19-nov-2010 1 initial release.
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